image/svg+xmlBachelor's Degree In Engineering
2008 - 2011
Analog Design Engineer, Motorola Solutions
- Chandler, AZ
March 2018 - September 2020
Electrical Design Engineer, Salt River Project
- Chandler, AZ
April 2014 - January 2018
Design Engineer, Intel
- Chandler, AZ
May 2012 - January 2014
Engineering Internship, Intel
- Hudson, MA
August 2011 - February 2012
Engineering Intern
Python
Communication
C++
Electrical Design
Electrical Systems
Java
Engineering Drawings
Hardware
IC
Donald Warren
36041 S. Evergreen Ln., Chandler, AZ 29957 |
dwarren@example.com
|
(460) 555-6731
Education
University of Connecticut - Mansfield, CT
Experience
Led Test Development, Debug and Verification for MIPI DigRF V4 High-Speed Serial Bus for LTE devices.
Promoted to reflect added responsibility of WLAN sub-circuit design within radio controller boards.
Designed IO ring, ESD structure for network processor.
Designed Analog IP blocks such as Amplifiers & Filters, CCO etc.
Designed Xilinx CPLD for Urchin project using Verilog and Renoir EDA.
Developed engineering computer applications to aid engineers in designing, material requesting and job tracking
of major utility projects.
Conducted feasibility study of the customer/marketing requirements and prepared the hardware design
specifications to achieve the planned time to market.
Developed Arc Flash program in accordance with NFPA 70E at both the Company's remote commercial facility
and local laboratories.
Performed training of technicians and carried out facility management assignments.
Facilitated distribution system reliability improvements by analyzing existing system and infrastructure
configurations.
Developed the small C/C++ library to access registers of the SoC and the framework interface with the C/C++ lib
through ctypes.
Supported Backend team with the synthesis effort.
Developed SQL database implementation and data mining application for test results.
Leveraged DOE to test multiple variables for proof of concept fan-less cooling system using piezoelectric blades.
Mixed Signal modelling and validation using Verilog AMS for Digital PLLs.
Developed Python scripts to automate the process of adding new hosts to Intel's API monitoring service.
Designed automated QA test configuration using TeamCity integration/automation platform.
Conducted user interviews, designed and collected survey data to understand existing sales forecast process.
Operated, maintained, and repaired specialized processing equipment that continuously provided high output
without compromising safety or quality.
Collaborated effectively with engineers and technicians to assist in the optimization of equipment utilization, lab
testing procedures, and schedules.
Skills